1. Field of the Invention
The present invention relates to a solid-state imaging device and a method for making the device, and a manufacturing substrate for a solid-state imaging device.
2. Description of the Related Art
Currently available solid-state imaging devices are usually complementary metal oxide semiconductor (CMOS) sensors of a front-illuminated type in which wiring layers are formed at the incident-light-side of photodiodes and incident light enters the photodiodes through the wiring layers. However, as miniaturization proceeds, the wiring pitch becomes narrower and the number of stacked layers increases, thereby increasing the thickness of wiring layers. As a result, the distance between a condenser lens that guides incident light to a photodiode and the photodiode increases, and obliquely incident light has difficulty reaching the photodiode.
A back-illuminated-type solid-state imaging element is an example of a solid-state imaging device that has addressed this problem (e.g., refer to Japanese Unexamined Patent Application Publication No. 2005-142221). A back-illuminated type solid-state imaging element has an effective aperture ratio of 100% for obliquely incident light and exhibits improved sensitivity.
As shown in FIG. 9A, a silicon-on-insulator (SOI) substrate 110 including an insulating layer (BOX layer) 112 and an active layer 113 on the insulating layer 112 is used in a back-illuminated solid-state imaging device. Then, as shown in FIG. 9B, a pinning layer 114 for suppressing dark current is formed in a lower portion of the active layer 113, i.e., a SOI layer, by ion implantation. As shown in FIG. 9C, photodiodes 121 are formed in the active layer 113. Although not shown in the drawing, transistors for pixel units, transistors for peripheral circuits, and other associated components are formed. Then wirings (not shown) and interlayer insulating films (not shown) are layered to form a wiring section 131. Subsequently, as shown in FIG. 9D, a support substrate 140 is bonded on the wiring section 131. As shown in FIG. 9E, the SOI substrate 110 is flipped, and a substrate portion 111 of the SOI substrate 110 is ground to expose the insulating layer 112, as shown in FIG. 9F. The end point of the back-surface grinding is detected by this insulating layer 112.
Next, as shown in FIG. 10A, the insulating layer 112 (refer to FIG. 9F) is removed to expose the active layer 113 in which the pinning layer 114 is formed. Then as shown in FIG. 10B, a color filter layer 151 is formed on the active layer 113 and condenser lenses 153 are formed on the color filter layer 151.
However, in forming the pinning layer 114 for suppressing dark current in the lower portion of the active layer 113 by ion implantation, the depth-direction distribution of the dopant concentration can rarely be made steep and thus suppression of the dark current has not been sufficient.